package kianxali.decoder.arch.x86.xml;

/**
 * A group used to categorize an opcode semantically.
 * @author fwi
 *
 */
public enum OpcodeGroup {
    PREFIX,
    PREFIX_SEGREG,
    PREFIX_BRANCH,
    PREFIX_BRANCH_CONDITIONAL,
    PREFIX_FPU,
    PREFIX_FPU_CONTROL,
    PREFIX_STRING, // undocumented in the XML doc

    OBSOLETE,
    OBSOLETE_CONTROL,

    GENERAL,
    GENERAL_DATAMOVE,
    GENERAL_STACK,
    GENERAL_CONVERSION,
    GENERAL_ARITHMETIC,
    GENERAL_ARITHMETIC_BINARY,
    GENERAL_ARITHMETIC_DECIMAL,
    GENERAL_LOGICAL,
    GENERAL_SHIFTROT,
    GENERAL_BITMANIPULATION,
    GENERAL_BRANCH,
    GENERAL_BRANCH_CONDITIONAL,
    GENERAL_BREAK,
    GENERAL_STRING, // can use REP prefix
    GENERAL_IO,
    GENERAL_FLAGCONTROL,
    GENERAL_SEGREGMANIPULATION,
    GENERAL_CONTROL,

    SYSTEM,
    SYSTEM_BRANCH,
    SYSTEM_BRANCH_TRANSITIONAL, // obeys operand-size attribute

    FPU,
    FPU_DATAMOVE,
    FPU_ARITHMETIC,
    FPU_COMPARISON,
    FPU_TRANSCENDENTAL,
    FPU_LOADCONST,
    FPU_CONTROL,
    FPU_CONVERSION,

    FPUSIMDSTATE,

    MMX_DATAMOV,
    MMX_ARITHMETIC,
    MMX_COMPARISON,
    MMX_CONVERSION,
    MMX_LOGICAL,
    MMX_SHIFT,
    MMX_UNPACK,

    SSE1_SINGLE, // SIMD single precision floating point
    SSE1_SINGLE_DATAMOVE,
    SSE1_SINGLE_ARITHMETIC,
    SSE1_SINGLE_COMPARISON,
    SSE1_SINGLE_LOGICAL,
    SSE1_SINGLE_SHUFFLEUNPACK,
    SSE1_CONVERSION,
    SSE1_INT64, // SIMD on 64 bit integers
    SSE1_MXCSR, // MXCSR state management
    SSE1_CACHE,
    SSE1_PREFETCH,
    SSE1_INSTRUCTIONORDER,

    SSE2_DOUBLE, // packed and scalar double precision floats
    SSE2_DOUBLE_DATAMOVE,
    SSE2_DOUBLE_CONVERSION,
    SSE2_DOUBLE_ARITHMETIC,
    SSE2_DOUBLE_COMPARISON,
    SSE2_DOUBLE_LOGICAL,
    SSE2_DOUBLE_SHUFFLEUNPACK,
    SSE2_SINGLE, // packed single precision floats
    SSE2_INT128, // SIMD on 128 bit integers
    SSE2_INT128_DATAMOVE,
    SSE2_INT128_ARITHMETIC,
    SSE2_INT128_SHUFFLEUNPACK,
    SSE2_INT128_SHIFT,
    SSE2_INT128_COMPARISON,
    SSE2_INT128_CONVERSION,
    SSE2_INT128_LOGICAL,
    SSE2_CACHE,
    SSE2_INSTRUCTIONORDER,

    SSE3_FLOAT, // SIMD single precision float
    SSE3_FLOAT_DATAMOVE,
    SSE3_FLOAT_ARITHMETIC,
    SSE3_CACHE,
    SSE3_SYNC,

    SSSE3_INT, // SIMD integer

    SSE41_INT, // SIMD integer
    SSE41_INT_DATAMOVE,
    SSE41_INT_ARITHMETIC,
    SSE41_INT_COMPARISON,
    SSE41_INT_CONVERSION,
    SSE41_FLOAT,
    SSE41_FLOAT_DATAMOVE,
    SSE41_FLOAT_ARITHMETIC,
    SSE41_FLOAT_CONVERSION,
    SSE41_CACHE,

    SSE42_INT, // SIMD integer
    SSE42_INT_COMPARISON,
    SSE42_STRINGTEXT
}